Call for papers

Artificial intelligence is progressing ever faster with new applications and results that would not be possible only a few years ago. At the same time, hardware security is becoming increasingly important for embedded systems applications where the number of such applications keeps on growing. The connection between AI and hardware security is becoming more prominent. Today, there are numerous applications where AI has either an offensive or defensive role for HW security. AIHWS aims to position itself in the intersection of these topics and provide a space where ideas converge into exciting new approaches for HW security. This workshop will provide an environment for researchers from academic and industrial domains to discuss findings and on-going work on all aspects of hardware security and artificial intelligence including design, attacks, manufacturing, testing, validation, utilization.

Topics of the workshop

  • Side-channel attacks and countermeasures

  • Trustworthy manufacturing and testing of secure devices

  • Validation and evaluation methodologies for physical security

  • Reconfigurable devices for security

  • Hardware Trojans

  • Fault injection attacks

  • Physical Unclonable Function (PUFs)

  • Security of Artificial Intelligence (AI)

  • AI-assisted design cycle

  • AI-based cryptanalysis

Submission

We encourage researchers working on all aspects of AI and HW security to take the opportunity and use AIHWS to share their work and participate in discussions. The authors are invited to submit the papers using EasyChair submission system through submission link https://easychair.org/my/conference?conf=aihws2024.
Submitted papers must be written in English and be anonymous, as we follow the double-anonymized review process, with no author names, affiliations, acknowledgments, or any identifying citations. All submissions must follow the original LNCS format with a page limit of 18 pages, including references and possible appendices. Papers should be submitted electronically in PDF format. The post-proceedings will be published in Springer’s LNCS series. Every accepted paper must have at least one author registered for the workshop.
There will be an ACNS best workshop paper award (with 500 EUR prize sponsored by Springer), to be selected from the accepted papers of all workshops.
Students also have the opportunity to receive the student travel grant, for details, see this website.

Important dates (AoE)

EXTENDED submission deadline!

Workshop paper submission deadline: Dec 5, 2023

previously Nov 15, 2023

Workshop paper notification: Jan 10, 2024

previously Dec 22, 2023 Jan 5, 2024

Camera-ready papers for pre-proceedings: Jan 20, 2024

previously Jan 9, 2024

Workshop date: Mar 5, 2024

ACNS Springer LNCS

Program

The program starts at 09:00 am, GST (Gulf Standard Time: UTC + 4h).

TIME
GST (UTC+4h) 		SESSION/TITLE
09:00 - 09:10 Opening remarks
09:10 - 09:30 Session 1
Diversity Algorithms for Laser Fault Injection
Marina Krček and Thomas Ordas
09:30 - 10:30 ACNS Keynote
Gene Tsudik
10:30 - 11:00 Coffee break
11:00 - 11:40 Session 1
FPGA Implementation of Physically Unclonable Functions based on Multi-threshold Delay Time Measurement Method to Mitigate Modeling Attacks
Tatsuya Oyama, Mika Sakai, Yohei Hori, Toshihiro Katashita and Takeshi Fujino
Harnessing the Power of LLMs in Hardware Trojan Design
Georgios Kokolakis, Athanasios Moschos and Angelos Keromytis
11:40 - 12:40 Keynote talk 1: Touching Points of AI and Cryptography
Moti Yung
12:40 - 14:00 Lunch break
14:00 - 15:00 Keynote talk 2: Hardware Security through the Lens of Dr AI
Debdeep Mukhopadhyay
15:00 - 15:20 Session 1
Everything All At Once: Deep Learning Side-Channel Analysis Optimization Framework
Gabriele Serafini, Léo Weissbart and Lejla Batina
15:20 - 15:40 Coffee break
15:40 - 17:00 Session 2
Incorporating Cluster Analysis of Feature Vectors for Non-profiled Deep-learning-based Side-channel Attacks
Yuta Fukuda, Kota Yoshida, and Takeshi Fujino
One for All, All for Ascon: Ensemble-based Deep Learning Side-channel Analysis
Azade Rezaeezade, Abraham Basurto-Becerra, Léo Weissbart, and Guilherme Perin
Creating from Noise: Trace Generations Using Diffusion Model for Side-Channel Attacks
Trevor Yap and Dirmanto Jap
CNN architecture extraction on edge GPU
Peter Horvath, Lukasz Chmielewski, Lejla Batina, Leo Weissbart, and Yuval Yarom
17:00 - 17:05 Closing remarks

Organizing Committee

General Chairs

Stjepan Picek

Radboud University, NL

Shivam Bhasin

NTU Singapore

Technical Program Committee

Kashif Nawaz, Cryptography Research Centre, Technology Innovation Institute, UAE

Liran Lerman

Vincent Verneuil, NXP Semiconductors, Germany

Lukasz Chmielewski, Masaryk University, Czech Republic

Luca Mariot, University of Twente, The Netherlands

Zhuoran Liu, Radboud University, The Netherlands

Lejla Batina, Radboud University, The Netherlands

Guilherme Perin, Leiden University, The Netherlands

Kostas Papagiannopoulos, University of Amsterdam, The Netherlands

Ileana Buhan, Radboud University, The Netherlands

Lichao Wu, Radboud University, The Netherlands

David Gerault, Technology Innovation Institute, UAE

Naofumi Homma, Tohoku University, Japan

Dirmanto Jap, Nanyang Technological University, Singapore

Alan Jović, University of Zagreb, Croatia

Fatemeh Ganji, Worcester Polytechnic Institute, USA

Web Chair

Marina Krček, TU Delft, The Netherlands

Questions about the workshop?
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